A) Field of the Invention
The present invention relates to a semiconductor device with semiconductor chips mounted on a mounting board.
B) Description of the Related Art
Conventionally, when a semiconductor chip is mounted on a mounting board, conductive pads on the mounting board and conductive pads on a semiconductor chip are mechanically and electrically bonded by metal bumps made of metal such as solder.
As the integration degree of a semiconductor chip improves and miniaturization of conductive pads improves, a density of current flowing through metal bumps increases. Therefore, metal atoms constituting the metal bump are likely to move due to electromigration. Movement of metal atoms cause breakdown (conduction defects) of bumps. For example, if solder bumps are used, Sn of the bump material is likely to move. As Sn moves, a region where a Sn density is lowered is formed, and breakdown is likely occur in this lowered density region.
While bonding is performed by melting solder, the semiconductor chip and mounting board are heated to a high temperature. As the semiconductor chip and mounting board lower their temperatures to a room temperature after bonding, stress is generated because of a difference between thermal expansion coefficients of the semiconductor chip and the mounting board. A thermal expansion coefficient of the mounting board is generally equal to or more than ten times that of the semiconductor chip. As the semiconductor chip and mounting board lower their temperatures to the room temperature, the mounting board shrinks more greatly. A compression stress is therefore applied to the semiconductor chip in an in-plane direction. As the stress is generated, a mechanically weakest region is broken. For example, metal bumps, low dielectric insulating materials of the semiconductor chip are broken. Stress of this type is also generated by a temperature change during device operation after mounting.
Japanese Patent National Publication No. 2004-528727 discloses techniques of bonding together conductive pads of a mounting board and a semiconductor chip by using carbon nanotubes. Description will be made on a bonding method disclosed in Japanese Patent National Publication No. 2004-528727.
Carbon nanotubes grow from the conductive pads of a semiconductor chip by plasma enhanced chemical vapor deposition (PECVD). Roots of the carbon nanotubes are buried (placed) in the conductive pads of the semiconductor chip, and tips thereof are buried in conductive pads of a mounting board. Namely, opposite ends of the carbon nanotubes are soldered to the conductive pads of the semiconductor chip and mounting board. In this manner, the semiconductor chip is mechanically and electrically bonded to the mounting board via the carbon nanotubes.
It is known that a density of current allowed to flow in one carbon nanotube is higher by two to three digits than that of conventional metal. Breakdown by electromigration is therefore hard to occur.
Since carbon nanotubes are flexible, a mounted semiconductor chip can move slightly in the in-plane direction relative to the mounting board. Destruction can therefore be prevented which is otherwise caused by a difference between thermal expansion coefficients.